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Espressif Systems /ESP32-P4 /HP_SYS_CLKRST /SOC_CLK_CTRL1

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Interpret as SOC_CLK_CTRL1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (REG_GPSPI2_SYS_CLK_EN)REG_GPSPI2_SYS_CLK_EN 0 (REG_GPSPI3_SYS_CLK_EN)REG_GPSPI3_SYS_CLK_EN 0 (REG_REGDMA_SYS_CLK_EN)REG_REGDMA_SYS_CLK_EN 0 (REG_AHB_PDMA_SYS_CLK_EN)REG_AHB_PDMA_SYS_CLK_EN 0 (REG_AXI_PDMA_SYS_CLK_EN)REG_AXI_PDMA_SYS_CLK_EN 0 (REG_GDMA_SYS_CLK_EN)REG_GDMA_SYS_CLK_EN 0 (REG_DMA2D_SYS_CLK_EN)REG_DMA2D_SYS_CLK_EN 0 (REG_VPU_SYS_CLK_EN)REG_VPU_SYS_CLK_EN 0 (REG_JPEG_SYS_CLK_EN)REG_JPEG_SYS_CLK_EN 0 (REG_PPA_SYS_CLK_EN)REG_PPA_SYS_CLK_EN 0 (REG_CSI_BRG_SYS_CLK_EN)REG_CSI_BRG_SYS_CLK_EN 0 (REG_CSI_HOST_SYS_CLK_EN)REG_CSI_HOST_SYS_CLK_EN 0 (REG_DSI_SYS_CLK_EN)REG_DSI_SYS_CLK_EN 0 (REG_EMAC_SYS_CLK_EN)REG_EMAC_SYS_CLK_EN 0 (REG_SDMMC_SYS_CLK_EN)REG_SDMMC_SYS_CLK_EN 0 (REG_USB_OTG11_SYS_CLK_EN)REG_USB_OTG11_SYS_CLK_EN 0 (REG_USB_OTG20_SYS_CLK_EN)REG_USB_OTG20_SYS_CLK_EN 0 (REG_UHCI_SYS_CLK_EN)REG_UHCI_SYS_CLK_EN 0 (REG_UART0_SYS_CLK_EN)REG_UART0_SYS_CLK_EN 0 (REG_UART1_SYS_CLK_EN)REG_UART1_SYS_CLK_EN 0 (REG_UART2_SYS_CLK_EN)REG_UART2_SYS_CLK_EN 0 (REG_UART3_SYS_CLK_EN)REG_UART3_SYS_CLK_EN 0 (REG_UART4_SYS_CLK_EN)REG_UART4_SYS_CLK_EN 0 (REG_PARLIO_SYS_CLK_EN)REG_PARLIO_SYS_CLK_EN 0 (REG_ETM_SYS_CLK_EN)REG_ETM_SYS_CLK_EN 0 (REG_PVT_SYS_CLK_EN)REG_PVT_SYS_CLK_EN 0 (REG_CRYPTO_SYS_CLK_EN)REG_CRYPTO_SYS_CLK_EN 0 (REG_KEY_MANAGER_SYS_CLK_EN)REG_KEY_MANAGER_SYS_CLK_EN 0 (REG_BITSRAMBLER_SYS_CLK_EN)REG_BITSRAMBLER_SYS_CLK_EN 0 (REG_BITSRAMBLER_RX_SYS_CLK_EN)REG_BITSRAMBLER_RX_SYS_CLK_EN 0 (REG_BITSRAMBLER_TX_SYS_CLK_EN)REG_BITSRAMBLER_TX_SYS_CLK_EN 0 (REG_H264_SYS_CLK_EN)REG_H264_SYS_CLK_EN

Description

Reserved

Fields

REG_GPSPI2_SYS_CLK_EN

Reserved
REG_GPSPI3_SYS_CLK_EN

Reserved
REG_REGDMA_SYS_CLK_EN

Reserved
REG_AHB_PDMA_SYS_CLK_EN

Reserved
REG_AXI_PDMA_SYS_CLK_EN

Reserved
REG_GDMA_SYS_CLK_EN

Reserved
REG_DMA2D_SYS_CLK_EN

Reserved
REG_VPU_SYS_CLK_EN

Reserved
REG_JPEG_SYS_CLK_EN

Reserved
REG_PPA_SYS_CLK_EN

Reserved
REG_CSI_BRG_SYS_CLK_EN

Reserved
REG_CSI_HOST_SYS_CLK_EN

Reserved
REG_DSI_SYS_CLK_EN

Reserved
REG_EMAC_SYS_CLK_EN

Reserved
REG_SDMMC_SYS_CLK_EN

Reserved
REG_USB_OTG11_SYS_CLK_EN

Reserved
REG_USB_OTG20_SYS_CLK_EN

Reserved
REG_UHCI_SYS_CLK_EN

Reserved
REG_UART0_SYS_CLK_EN

Reserved
REG_UART1_SYS_CLK_EN

Reserved
REG_UART2_SYS_CLK_EN

Reserved
REG_UART3_SYS_CLK_EN

Reserved
REG_UART4_SYS_CLK_EN

Reserved
REG_PARLIO_SYS_CLK_EN

Reserved
REG_ETM_SYS_CLK_EN

Reserved
REG_PVT_SYS_CLK_EN

Reserved
REG_CRYPTO_SYS_CLK_EN

Reserved
REG_KEY_MANAGER_SYS_CLK_EN

Reserved
REG_BITSRAMBLER_SYS_CLK_EN

Reserved
REG_BITSRAMBLER_RX_SYS_CLK_EN

Reserved
REG_BITSRAMBLER_TX_SYS_CLK_EN

Reserved
REG_H264_SYS_CLK_EN

Reserved

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd